A digital system is typically designed as a collection of subsystems, each performing a different computation and communicating with its peers to exchange information. Before a communication transaction takes place, the subsystems involved need to synchronise, namely to wait for a common control state to be reached, which guarantees the validity of data exchaged.

The predominant synchronization technique in hardware design today is the utilisation of a global clock whose transitions define the points in time when communication transactions between components can take place. This synchronous approach however has reached a critical point, with clock distribution becoming a costly and complicated issue.   As VLSI technology advances and systems become larger, faster and more complex, timing problems become increasingly severe and account for more and more of the design and debugging expense. Increased clock speeds make on-chip clock skew significant and inter-chip skew a major problem.

Thus, the last decade has witnessed an explosion of interest in asynchronous design techniques, which do not rely on global clocks but achieve synchronization by means of localized handshake synchronization protocols between the communicating subsystems. These protocols are typically in the form of local request and acknowledge signals, which provide information regarding the validity of data signals. An example of such a protocol is the (two-phase bundled data) handshake synchronisation protocol illustrated in the figure below:      

Other potential advantages of asynchronous logic are low power consumption, high performance and support for a modular design philosophy which makes incremental technological migration a much easier task. Several asynchronous design techniques have been developed and are progressively finding their place in the mainstream VLSI design, not least in the development of GALS (Globally Asynchronous Locally Synchronous) systems.

The Asynchronous Online Logic Home Page  maintainedby the AMULET group at the University of Manchester
provides continuous, up to date information regarding asynchronous systems research.