Compiling Complete Programs into Circuits (CCPC 2012)
Sunday 4 March 2012. London.
workshop co-located with
David F. Bacon IBM Research
Satnam Singh Google and the
University of Birimingham
Compiling programs into circuits is becoming increasingly
important as we strive to reduce the latency and energy consumption of our
computing systems. Although significant effort has been put into the task
of "C to gates" synthesis which aims to improve the productivity of
hardware engineers there has been little work in the area of converting
complete programs written by software engineers into circuits. The purpose
of this workshop is to bring together researchers and developers working
on novel techniques for translating programs into circuits as well as
people using alternative techniques for translating algorithms into
circuits without using conventional hardware description languages based
on event-based simulation semantics. Our objective is to foster
interaction between researchers and developers working in this area and to
establish a community that can help drive forward a common set of goals
and principles for the synthesis of programs into circuits.
agenda of the workshop is:
- 09:15 - 09:30. Introduction and welcome. Satnam Singh, Google, USA.
- 09:30 - 10:00. Parallelism and Pipelining
for the Packet Processing Programmer. Gordon Brebner,
Xilinx Labs, San Jose, USA.
- 10:00 - 10:30. From Recursive Functions to
Real FPGAs. Stephen Edwards, Columbia University, USA.
- 10:30 - 11:00. Break.
- 11:00 - 11:30.
Mapping algorithms to hardware using ClaSH. Jan Kuper,
University of Twente, The Netherlands.
- 11:30 - 12:00. Separate and Hetereogenous
Compilation for Hardware. Dan Ghica, University of
- 12:00 - 12:30. Compiling for
Tightly-Integrated FPGAs such as the Convey HC-1. Rishiyur S.
Nikhil, Bluespec Inc, USA.
- 12:30 - 13:30. Lunch.
- 13:30 - 14:00. Rebooting SCORE for the
next generation. Nachiket Kapre, Imperial College,
- 14:00 - 14:30.
Simulate parallel computers in hardware, not software. Simon
Moore, Cambridge University, UK.
- 14:30 - 15:00. Compiling OpenCL kernels
into FPGA-based processor networks.
Wim Vanderbauwhede, The University of Glasgow, UK.
- 15:00 - 15:30. Break.
- 15:30 - 16:00. Automatic Synthesis of
Off-Chip Memory Controllers. Samuel Bayliss, Imperial
- 16:30 - 17:00. Hardware Design in Lime. David
F. Bacon, IBM T J Watson, USA.
- 17:00 - 17:30. Deadlock and
Combinational Avoidance for High-Level Synthesis. David
Greaves, The University of Cambridge, UK.