Research experience: My PhD dissertation was on implementing next-generation public-key cryptography (PKC) on hardware platforms, and my Master's thesis was on implementing elliptic curve-based public-key cryptography on FPGAs. The complete list of my publications can be found at Google Scholar.
My research experience spans four areas: implementation of lattice-based post-quantum PKC, implementation of elliptic curve-based PKC, simple power and time side channel analysis of elliptic curve and lattice-based PKC, and implementation of lattice-based homomorphic encryption.
My research works have been generously funded by:
1. Junior Research Fellowship in Indian Institute of Technology Kharagpur.
2. KU Leuven Scholarship for my pre-doctoral study in KU Leuven (from October 2012 to May 2013).
3. Erasmus Mundus Scholarship (EXPERTS-III) for my PhD study in KU Leuven.
4. KU Leuven PDM fellowship (one year) for post-doctoral research.
5. Selected for National Fund for Scientific Research in Flanders (FWO) postdoctoral fellowship.
TeachingI will be teaching C/C++ in the second semester at the School of Computer Science, University of Birmingham. Previously I was teaching practical sessions of Design of Digital Platforms course in master's degree in electrical engineering at KU Leuven.
Master/Bachelor project topics:This year (2018), I'm interested in projects on implementation aspects of next-generation cryptographic schemes.
1. Implementation of post-quantum cryptography modules.
2. Hardware acceleration of cryptographic schemes.
3. Security of Software-defined networking (SDN).
4. Convolutional Neural Network (CNN) Processor Architecture.
- In the program committees of SAC 2018, SPACE 2018, VLSID 2018, CHES 2019.
- Reviewer of IEEE Transactions on VLSI, IEEE Transactions on Circuits and Systems, IEEE Transactions on Computers, Journal of Cryptographic Engineering.
Implementation of lattice-based PKC. The main focus of my doctoral research was the feasibility-study of lattice-based post-quantum cryptographic schemes. When I started my doctoral research, almost all of the published literature covered the theoretical aspects of lattice-based cryptography; not much was known about their practical efficiency. We designed efficient building blocks for lattice-based cryptography and to show that lattice-based public-key is practical. We designed a compact coprocessor architecture in hardware that can compute post-quantum encryption/decryption in 20/9 micro seconds. Further, we analyzed side channel security of the implemented schemes and proposed countermeasures. Recently we have constructed and implemented a lattice-based key encapsulation scheme called 'Saber' based on a new lattice-problem called module learning with rounding. The scheme and its implementation have been submitted in the NIST's post-quantum standardization process. See our web page https://www.esat.kuleuven.be/cosic/pqcrypto/saber/ on Saber for more details.
Implementation of lattice-based homomorphic encryption. During my doctoral research, we also designed fast and parallel algorithms and hardware accelerators for lattice-based homomorphic encryption schemes using FPGAs. We observed that though the computation intensive arithmetic can be accelerated, the overhead of external memory access becomes a bottleneck. Then we proposed a more practical scheme that interpolates between homomorphic encryption and multi-party computation and achieves faster evaluation time. Recently, we have designed a programmable processor architecture for homomorphically evaluating neural networks in the context of smart meters.
Implementation of elliptic curve-based PKC. We successfully developed a theoretical model to estimate optimal design configurations for implementing an elliptic curve cryptoprocessor. The research project resulted in a very fast processor architecture for elliptic curve cryptography. We also designed a high-security elliptic curve PKC processor for resource-constrained IoT platforms. Previous proposals focused predominantly on low-security elliptic-curves. We were the first to design lightweight algorithms that are computationally efficient as well as resistant against simple side-channel analysis-based attacks. The lightweight PKC architecture for IoT has received attention from the chip designing industry.
I received the BS degree in electronics and telecommunication engineering from Indian Institute of Engineering Science and Technology, Shibpur, in 2007 and received the MS degree in computer science and engineering from Indian Institute of Technology, Kharagpur, in 2012. In June 2017 I received the PhD degree with `Summa cum laude with congratulations from the examination committee' (~top 5%) from the Computer Security and Industrial Cryptography (COSIC) group, Department of Electrical Engineering (ESAT), KU Leuven, Belgium. I received the IBM Innovation Award 2018 in recognition of an outstanding doctoral thesis in informatics.
|1.||A. Karmakar, J. Bermudo Mera, S. Sinha Roy, and I. Verbauwhede, "Saber on ARM. CCA-secure module lattice-based key encapsulation on ARM," In Transactions in Cryptographic Hardware and Embedded Systems, Lecture Notes in Computer Science, Springer-Verlag, 24 pages, 2018.|
|2.||J. P. D'Anvers, A. Karmakar, S. Sinha Roy, and F. Vercauteren, "Saber: Module-LWR based key exchange, CPA-secure encryption and CCA-secure KEM," In Progress in Cryptology - AFRICACRYPT 2018, Lecture Notes in Computer Science, Springer-Verlag, 23 pages, 2018.|
|3.||A. Karmakar, S. Sinha Roy, O. Reparaz, I. Verbauwhede, and F. Vercauteren, "Constant-time Discrete Gaussian Sampling," IEEE Transactions on Computers SI PQcrypto(accepted), 12 pages, 2017.|
|4.||S. Sinha Roy, K. Jarvinen, I. Verbauwhede, F. Vercauteren, and J. Vliegen, "HEPCloud: An FPGA-based Multicore Processor for FV Somewhat Homomorphic Function Evaluation," IEEE Transactions on Computers SI PQcrypto(accepted), 14 pages, 2017.|
|5.||Z. Liu, T. Poppelmann, T. Oder, H. Seo, J. Großschädl, T. Güneysu, H. Kim, S. Sinha Roy, and I. Verbauwhede, "High-Performance Ideal Lattice-Based Cryptography on 8-Bit AVR Microcontrollers," Transactions on Embedded Computing Systems (TECS) - Special Issue on Secure and Fault-Tolerant 16(117), 24 pages, 2017.|
|6.||S. Sinha Roy, "Public Key Cryptography on Hardware Platforms: Design and Analysis of Elliptic Curve and Lattice-based Cryptoprocessors," PhD thesis, KU Leuven, I. Verbauwhede, and F. Vercauteren (promotors), 192 pages, 2017.|
|7.||S. Sinha Roy, F. Vercauteren, J. Vliegen, and I. Verbauwhede, "Hardware Assisted Fully Homomorphic Function Evaluation and Encrypted Search," IEEE Transactions on Computers PP(99), pp. 1-12, 2017.|
|8.||S. Sinha Roy, A. Karmakar, and I. Verbauwhede, "Ring-LWE: Applications to cryptography andtheir efficient realization," In International Conference on Security, Privacy and Applied Cryptography Engineering, Lecture Notes in Computer Science 8204, A. Agarwal, M. Arun Kumar, and S. Chamarty (eds.), Springer-Verlag, 10 pages, 2016.|
|9.||A. Karmakar, S. Sinha Roy, I. Verbauwhede, and F. Vercauteren, "Efficient Finite Field Multiplication for Isogeny Based Post Quantum Cryptography," In International Workshop on the Arithmetic of Finite Fields (WAIFI 2016), Lecture Notes in Computer Science, Springer-Verlag, 15 pages, 2016.|
|10.||O. Reparaz, S. Sinha Roy, R. De Clercq, I. Verbauwhede, and F. Vercauteren, "Masking ring-LWE," Journal of Cryptographic Engineering 6(2), 17 pages, 2016.|
|11.||J. Bosmans, S. Sinha Roy, K. Jarvinen, and I. Verbauwhede, "A Tiny Coprocessor for Elliptic Curve Cryptography over the 256-bit NIST Prime Field.," VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) -(-), 6 pages, 2016.|
|12.||O. Reparaz, S. Sinha Roy, R. De Clercq, F. Vercauteren, and I. Verbauwhede, "Additively Homomorphic ring-LWE Masking," In Post-Quantum Cryptography, Lecture Notes in Computer Science 9606, T. Takagi (ed.), Springer-Verlag, pp. 233-244, 2016.|
|13.||D. Mukhopadhyay, S. Sinha Roy, and I. Verbauwhede, "Tutorial: Embedded Security," VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID), Kolkata, IN, 2016.|
|14.||O. Reparaz, S. Sinha Roy, I. Verbauwhede, and F. Vercauteren, "A masked ring-LWE implementation," In Cryptographic Hardware and Embedded Systems - CHES 2015, Lecture Notes in Computer Science 9293, T. Güneysu, and H. Handschuh (eds.), Springer-Verlag, pp. 683-702, 2015.|
|15.||Z. Liu, H. Seo, S. Sinha Roy, J. Großschädl, H. Kim, and I. Verbauwhede, "Efficient Ring-LWE Encryption on 8-bit AVR Processors," In Cryptographic Hardware and Embedded Systems - CHES 2015, Lecture Notes in Computer Science 9293, T. Güneysu, and H. Handschuh (eds.), Springer-Verlag, 22 pages, 2015.|
|16.||S. Sinha Roy, K. J"arvinen, and I. Verbauwhede, "Lightweight Coprocessor for Koblitz Curves: 283-bit ECC Including Scalar Conversion with only 4300 Gates," In Cryptographic Hardware and Embedded Systems - CHES 2015, Lecture Notes in Computer Science 9293, T. Güneysu, and H. Handschuh (eds.), Springer-Verlag, 21 pages, 2015.|
|17.||S. Sinha Roy, K. Jarvinen, F. Vercauteren, V. Dimitrov, and I. Verbauwhede, "Modular Hardware Architecture for Somewhat Homomorphic Function Evaluation," In Cryptographic Hardware and Embedded Systems - CHES 2015, Lecture Notes in Computer Science 9293, T. Güneysu, and H. Handschuh (eds.), Springer-Verlag, 21 pages, 2015.|
|18.||R. De Clercq, S. Sinha Roy, I. Verbauwhede, and F. Vercauteren, "Efficient Software Implementation of Ring-LWE Encryption," In Design, Automation and Test in Europe (DATE 2015), IEEE, 6 pages, 2015.|
|19.||I. Verbauwhede, J. Balasch, S. Sinha Roy, and A. Van Herrewege, "Circuit challenges from cryptography," In International Solid-State Circuits Conference, IEEE, pp. 428-429, 2015.|
|20.||D. Donglong Chen, N. Mentens, F. Vercauteren, S. Sinha Roy, R. C. Cheung, D. Pao, and I. Verbauwhede, "High-speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems," IEEE Transactions on Circuits and Systems I: Regular Papers 62(1), pp. 157-166, 2015.|