Towards low power approximate DCT architecture for HEVC standard

Created by W.Langdon from gp-bibliography.bib Revision:1.4524

  author =       "Zdenek Vasicek and Vojtech Mrazek and Lukas Sekanina",
  title =        "Towards low power approximate {DCT} architecture for
                 {HEVC} standard",
  booktitle =    "Design, Automation Test in Europe Conference
                 Exhibition (DATE), 2017",
  year =         "2017",
  pages =        "1576--1581",
  address =      "Lausanne, Switzerland",
  month =        "27-31 " # mar,
  publisher =    "IEEE",
  keywords =     "genetic algorithms, genetic programming, Discrete
                 cosine transforms",
  ISSN =         "1558-1101",
  DOI =          "doi:10.23919/DATE.2017.7927241",
  size =         "6 pages",
  abstract =     "Video processing performed directly on IoT nodes is
                 one of the most performance as well as energy demanding
                 applications for current IoT technology. In order to
                 support real-time high-definition video,
                 energy-reduction optimizations have to be introduced at
                 all levels of the video processing chain. This paper
                 deals with an efficient implementation of Discrete
                 Cosine Transform (DCT) blocks employed in video
                 compression based on the High Efficiency Video Coding
                 (HEVC) standard. The proposed multiplier less 4-input
                 DCT implementations contain approximate adders and
                 subtractors that were obtained using genetic
                 programming. In order to manage the complexity of
                 evolutionary approximation and provide formal
                 guarantees in terms of errors of key circuit
                 components, the worst and average errors were
                 determined exactly by means of Binary decision
                 diagrams. Under conditions of our experiments,
                 approximate 4-input DCTs show better quality/power
                 trade-offs than relevant implementations available in
                 the literature. For example, 25percent power reduction
                 for the same error was obtained in comparison with a
                 recent highly optimized implementation.",

Genetic Programming entries for Zdenek Vasicek Vojtech Mrazek Lukas Sekanina