Low Cost Platform for Evolvable-Based Boolean Synthesis

Created by W.Langdon from gp-bibliography.bib Revision:1.4216

  author =       "Cesar Pedraza Bonilla and Carlos Ivan Camargo",
  title =        "Low Cost Platform for Evolvable-Based {Boolean}
  booktitle =    "IEEE Second Latin American Symposium on Circuits and
                 Systems (LASCAS), 2011",
  year =         "2011",
  month =        feb,
  abstract =     "Evolutionary algorithms are another option for
                 combinational synthesis because they allow for the
                 generation of hardware structures that cannot be
                 obtained with other techniques. This paper shows a
                 parallel genetic programming (PGP) Boolean synthesis
                 implementation based on a low cost cluster of an
                 embedded platform called SIE, based on a 32-bit
                 processor and a Spartan-3 FPGA. Some tasks of the PGP
                 have been accelerated in hardware and results have been
                 compared with an HPC implementation, resulting in
                 speedup values up to approximately 180.",
  keywords =     "genetic algorithms, genetic programming, 32-bit
                 processor, HPC implementation, PGP Boolean synthesis
                 implementation, SIE, combinational synthesis, embedded
                 platform, evolutionary algorithms, evolvable-based
                 Boolean synthesis, hardware structures, low cost
                 cluster, low cost platform, parallel genetic
                 programming, spartan-3 FPGA, speedup values, Boolean
                 functions, combinational circuits, embedded systems,
                 field programmable gate arrays, logic design,
                 microprocessor chips",
  DOI =          "doi:10.1109/LASCAS.2011.5750310",
  notes =        "Also known as \cite{5750310}",

Genetic Programming entries for Cesar Pedraza Bonilla Carlos Ivan Camargo Bareno