A new variable topology for evolutionary hardware design

Created by W.Langdon from gp-bibliography.bib Revision:1.4216

  author =       "Chih-Yung Chen and Rey-Chue Hwang",
  title =        "A new variable topology for evolutionary hardware
  journal =      "Expert Systems with Applications",
  volume =       "36",
  number =       "1",
  pages =        "634--642",
  year =         "2009",
  ISSN =         "0957-4174",
  DOI =          "doi:10.1016/j.eswa.2007.09.017",
  URL =          "http://www.sciencedirect.com/science/article/B6V03-4PV2RVX-6/2/6aa751f84c76e323ab6ddab36f70e63d",
  keywords =     "genetic algorithms, genetic programming, evolvable
                 hardware, Evolutionary hardware design, Slicing
                 structure, Routing graph",
  abstract =     "In this paper, a novel variable topology for
                 evolutionary hardware design is proposed. The slicing
                 structure and routing graph are integrated into the
                 design of evolutionary hardware. With off-line
                 gate-level samples, simulation results clearly
                 demonstrate the validity of this new approach performed
                 as superior as existing methods in the logic circuit
                 optimization. Compare with the random circuit matrix
                 method, our approach uses less code length for
                 evolutionary hardware description. The method we
                 proposed could be taken as an alternative way for
                 possible evolutionary hardware applications in the
  notes =        "EHW, GP, graph based GA",

Genetic Programming entries for Chih-Yung Chen Rey-Chue Hwang