The route to a defect tolerant LUT through artificial evolution

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@Article{Djupdal:2011:GPEM,
  author =       "Asbjoern Djupdal and Pauline Haddow",
  title =        "The route to a defect tolerant LUT through artificial
                 evolution",
  journal =      "Genetic Programming and Evolvable Machines",
  year =         "2011",
  volume =       "12",
  number =       "3",
  pages =        "281--303",
  month =        sep,
  note =         "Special Issue Title: Evolvable Hardware Challenges",
  keywords =     "genetic algorithms, genetic programming, evolvable
                 hardware",
  ISSN =         "1389-2576",
  DOI =          "doi:10.1007/s10710-011-9129-2",
  size =         "23 pages",
  abstract =     "Evolutionary techniques may be applied to search for
                 specific structures or functions, as specified in the
                 fitness function. This paper addresses the challenge of
                 finding an appropriate fitness function when searching
                 for generic rather than specific structures which, when
                 combined with characteristics of defect tolerance on
                 the circuit. Production defects for integrated circuits
                 are expected to increase considerably. To avoid a
                 corresponding drop in yield, improved defect tolerance
                 solutions are needed. In the case of Field Programmable
                 Gate Arrays (FPGAs), the pre-designed gate array
                 provides a bridge between production and the
                 application designers. Thus, introduction of defect
                 tolerant techniques to the FPGA itself could provide a
                 defect free gate array to the application designer,
                 despite production defects. The search for defect
                 tolerance presented herein is directed at finding
                 defect tolerant structures for an important building
                 block of FPGAs: Look-Up Tables (LUTs). Two key
                 approaches are presented: (1) applying evolved generic
                 building blocks to a traditional LUT design and (2)
                 evolving the LUT design directly. The results highlight
                 the fact that evolved generic defect tolerant
                 structures can contribute to highly reliable circuit
                 designs at the expense of area usage. Further, they
                 show that applying such a technique, rather than direct
                 evolution, has benefits with respect to evolvability of
                 larger circuits, again at the expense of area usage.",
  affiliation =  "CRAB Lab, IDI, NTNU, Trondheim, Norway",
}

Genetic Programming entries for Asbjoern Djupdal Pauline Haddow

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