Automated extraction of expert knowledge in analog topology selection and sizing

Created by W.Langdon from gp-bibliography.bib Revision:1.3949

@InProceedings{McConaghy:2008:ICCAD,
  author =       "Trent McConaghy and Pieter Palmers and 
                 Georges Gielen and Michiel Steyaert",
  title =        "Automated extraction of expert knowledge in analog
                 topology selection and sizing",
  booktitle =    "IEEE/ACM International Conference on Computer-Aided
                 Design, ICCAD 2008",
  year =         "2008",
  pages =        "392--395",
  address =      "San Jose, CA, USA",
  month =        "10-13 " # nov,
  keywords =     "genetic algorithms, genetic programming, EHW, Pareto
                 analysis, analogue circuits, circuit optimisation, data
                 mining, electronic engineering computing, expert
                 systems, network topology, operational amplifiers,
                 Pareto optimal set, analog circuit topology, analog
                 topology selection, analog topology sizing, datamining
                 perspective, expert knowledge automated extraction,
                 operational amplifier design, performance
                 specifications, sizing variables, specs-to-topology
                 decision tree, topology choice, Analytical models, CMOS
                 technology, Circuit simulation, Circuit topology,
                 Databases, Decision trees, Design automation,
                 Operational amplifiers, Performance analysis, Space
                 technology",
  isbn13 =       "978-1-4244-2819-9",
  URL =          "http://trent.st/content/2008-ICCAD-cad_synthesis_insight.pdf",
  DOI =          "doi:10.1109/ICCAD.2008.4681603",
  size =         "4 pages",
  abstract =     "This paper presents a methodology for analog designers
                 to maintain their insights into the relationship among
                 performance specifications, topology choice, and sizing
                 variables, despite those insights being constantly
                 challenged by changing process nodes and new specs. The
                 methodology is to take a data-mining perspective on a
                 Pareto Optimal Set of sized analog circuit topologies,
                 then doing: extraction of a specs-to-topology decision
                 tree; global nonlinear sensitivity analysis on topology
                 and sizing variables; and determining analytical
                 expressions of performance tradeoffs. These approaches
                 are all complementary as they answer different designer
                 questions. Once the knowledge is extracted, it can be
                 readily distributed to help other designers, without
                 needing further synthesis. Results are shown for
                 operational amplifier design on a database containing
                 thousands of Pareto Optimal designs across five
                 objectives.",
  notes =        "Also known as \cite{4681603}",
}

Genetic Programming entries for Trent McConaghy Pieter Palmers Georges G E Gielen Michiel Steyaert

Citations