Parallel Optimization of Transistor Level Circuits Using Cartesian Genetic Programming

Created by W.Langdon from gp-bibliography.bib Revision:1.3872

@InProceedings{Mrazek:2017:GECCO,
  author =       "Vojtech Mrazek and Zdenek Vasicek",
  title =        "Parallel Optimization of Transistor Level Circuits
                 Using Cartesian Genetic Programming",
  booktitle =    "Proceedings of the Genetic and Evolutionary
                 Computation Conference Companion",
  series =       "GECCO '17",
  year =         "2017",
  isbn13 =       "978-1-4503-4939-0",
  address =      "Berlin, Germany",
  pages =        "1849--1856",
  size =         "8 pages",
  URL =          "http://doi.acm.org/10.1145/3067695.3084212",
  DOI =          "doi:10.1145/3067695.3084212",
  acmid =        "3084212",
  publisher =    "ACM",
  publisher_address = "New York, NY, USA",
  keywords =     "genetic algorithms, genetic programming, cartesian
                 genetic programming, digital circuits, evolutionary
                 optimization, parallel systems, transistor-level",
  month =        "15-19 " # jul,
  abstract =     "The aim of the paper is to introduce a new parallel
                 approach to evolutionary optimization of digital
                 circuits described on transistor level. The
                 evolutionary optimization is guided by the fitness
                 function employing a simulator of candidate circuits. A
                 new discrete simulator was introduced to achieve a good
                 trade-off between precision and cost of circuit
                 evaluations. The simulator is based on event-driven
                 simulation. Precise numeric SPICE simulator is
                 regularly called to validate simulation results. To
                 increase the speed of evolution, three parallel
                 approaches were proposed: (i) thread level parallelism,
                 (ii) multiple computing nodes which collectively
                 communicate and distribute the best solution, and (iii)
                 client-server architecture eliminating a limited count
                 of SPICE simulator instances.",
  notes =        "Also known as \cite{Mrazek:2017:POT:3067695.3084212}
                 GECCO-2017 A Recombination of the 26th International
                 Conference on Genetic Algorithms (ICGA-2017) and the
                 22nd Annual Genetic Programming Conference (GP-2017)",
}

Genetic Programming entries for Vojtech Mrazek Zdenek Vasicek

Citations