Customising compilers for customisable processors

Created by W.Langdon from gp-bibliography.bib Revision:1.3872

@PhdThesis{Murray2012,
  author =       "Alastair Colin Murray",
  title =        "Customising compilers for customisable processors",
  school =       "Informatics, Edinburgh University",
  year =         "2011",
  address =      "UK",
  keywords =     "genetic algorithms, genetic programming",
  URL =          "http://hdl.handle.net/1842/8028",
  URL =          "https://www.era.lib.ed.ac.uk/bitstream/handle/1842/8028/Murray2012.pdf",
  size =         "280 pages",
  abstract =     "The automatic generation of instruction set extensions
                 to provide application-specific acceleration for
                 embedded processors has been a productive area of
                 research in recent years. There have been incremental
                 improvements in the quality of the algorithms that
                 discover and select which instructions to add to a
                 processor. The use of automatic algorithms, however,
                 result in instructions which are radically different
                 from those found in conventional, human-designed, RISC
                 or CISC ISAs. This has resulted in a gap between the
                 hardware's capabilities and the compiler's ability to
                 exploit them. This thesis proposes and investigates the
                 use of a high-level compiler pass that uses
                 graph-subgraph isomorphism checking to exploit these
                 complex instructions. Operating in a separate pass
                 permits techniques to be applied that are uniquely
                 suited for mapping complex instructions, but unsuitable
                 for conventional instruction selection. The existing,
                 mature, compiler back-end can then handle the remainder
                 of the compilation. With this method, the high-level
                 pass was able to use 1965 different automatically
                 produced instructions to obtain an initial average
                 speed-up of 1.11x over 179 benchmarks evaluated on a
                 hardware-verified cycle-accurate simulator. This result
                 was improved following an investigation of how the
                 produced instructions were being used by the compiler.
                 It was established that the models the automatic tools
                 were using to develop instructions did not take account
                 of how well the compiler could realistically use them.
                 Adding additional parameters to the search heuristic to
                 account for compiler issues increased the speed-up from
                 1.11x to 1.24x. An alternative approach using a
                 re-designed hardware interface was also investigated
                 and this achieved a speed-up of 1.26x while reducing
                 hardware and compiler complexity. A complementary,
                 high-level, method of exploiting dual memory banks was
                 created to increase memory bandwidth to accommodate the
                 increased data-processing bandwidth provided by
                 extension instructions. Finally, the compiler was
                 considered for use in a non-conventional role where
                 rather than generating code it is used to apply
                 source-level transformations prior to the generation of
                 extension instructions and thus affect the shape of the
                 instructions that are generated.",
  notes =        "SMART-2009 Alastair Murray and Bjorn Franke",
}

Genetic Programming entries for Alastair Murray

Citations