Using Module-level Evolvable hardware Approach in Design of Sequential Logic Circuits

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@InProceedings{Tao:2012:CEC,
  title =        "Using Module-level Evolvable hardware Approach in
                 Design of Sequential Logic Circuits",
  author =       "Yanyun Tao and Jian Cao and Yuzhen Zhang and 
                 Jiajun Lin and Minglu Li",
  pages =        "2234--2241",
  booktitle =    "Proceedings of the 2012 IEEE Congress on Evolutionary
                 Computation",
  year =         "2012",
  editor =       "Xiaodong Li",
  month =        "10-15 " # jun,
  DOI =          "doi:10.1109/CEC.2012.6256546",
  size =         "8 pages",
  address =      "Brisbane, Australia",
  ISBN =         "0-7803-8515-2",
  keywords =     "genetic algorithms, genetic programming, EHW, CGP,
                 ECGP, ADF",
  abstract =     "in this study, we propose a module-level Evolvable
                 hardware (EHW) approach to design synchronous
                 sequential circuits and minimise the circuit complexity
                 (the number of logic gates and wires used). Firstly, we
                 use evolutionary algorithm (EA) to implement states
                 simplification and obtain near-optimal state
                 assignment, which requires few logic gates and wires.
                 Then, EHW evolves a set of high performing circuits and
                 uses data mining method to find frequently evolved
                 blocks (a component of logic gates) from these circuits
                 in its pre-evolution stage. Frequently evolved blocks
                 would be re-used in functional and terminals set for
                 evolving better circuits. EHW has a faster convergence
                 so that the circuit with small complexity could be
                 evolved. Auto starting ability of circuits would also
                 be test by the fitness function of EHW. Finally, two
                 sequence detectors, two module counters, and ISCAS'89
                 circuit are used as the proof for our evolutionary
                 design approach. Simulation results of experiments are
                 given, and our evolutionary algorithm is shown to be
                 better than other methods in terms of convergence time,
                 success rate, and maximum fitness across generations.",
  notes =        "GA, GP, CGP, ECGP, ADFs, increment evolution

                 WCCI 2012. CEC 2012 - A joint meeting of the IEEE, the
                 EPS and the IET.",
}

Genetic Programming entries for Yanyun Tao Jian Cao Yuzhen Zhang Jiajun Lin Minglu Li

Citations