A module-level three-stage approach to the evolutionary design of sequential logic circuits

Created by W.Langdon from gp-bibliography.bib Revision:1.3872

@Article{Tao:2013:GPEM,
  author =       "Yanyun Tao and Yuzhen Zhang and Jian Cao and 
                 Yalong Huang",
  title =        "A module-level three-stage approach to the
                 evolutionary design of sequential logic circuits",
  journal =      "Genetic Programming and Evolvable Machines",
  year =         "2013",
  volume =       "14",
  number =       "2",
  pages =        "191--219",
  month =        jun,
  keywords =     "genetic algorithms, genetic programming, evolvable
                 hardware, cartesian genetic programming, Evolutionary
                 approach, Module-level, Three-stage, Sequential
                 circuits, Data mining, Frequently evolved blocks,
                 Redundant states",
  ISSN =         "1389-2576",
  DOI =          "doi:10.1007/s10710-012-9178-1",
  size =         "29 pages",
  abstract =     "In this study, we propose a module-level three-stage
                 approach (TSA) to optimise the evolutionary design for
                 synchronous sequential circuits. TSA has a three stages
                 process, involving a genetic algorithm (GA), a
                 pre-evolution, and a re-evolution. In the first stage,
                 the GA simplifies the number of states and
                 automatically searches the state assignment that can
                 produce the circuit with small complexity. Then, the
                 second stage evolves a set of high-performing circuits
                 to acquire frequently evolved blocks, which will be
                 re-used for more compact and simple solutions in the
                 next stage. In this stage, a genetic programming (GP)
                 is proposed for evolving the high-performing circuits
                 and data mining is used as a finder of frequently
                 evolved blocks in these circuits. In the final stage,
                 the acquired blocks are encapsulated into the function
                 and terminal set to produce a new population in the
                 re-evolution. The blocks are expected to make the
                 convergence faster and hence efficiently reduce the
                 complexity of the evolved circuits. Seven problems of
                 three types, sequence detectors, modulo-n counters and
                 ISCAS89 circuits, are used to test our three-stage
                 approach. The simulation results for these experiments
                 are promising, and our approach is shown to be better
                 than the other methods for sequential logic circuits
                 design in terms of convergence time, success rate, and
                 maximum fitness improvement across generations",
}

Genetic Programming entries for Yanyun Tao Yuzhen Zhang Jian Cao Yalong Huang

Citations