Evolutionary design of approximate multipliers under different error metrics

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@InProceedings{Vasicek:2014:isddecs,
  author =       "Zdenek Vasicek and Lukas Sekanina",
  booktitle =    "17th International Symposium on Design and Diagnostics
                 of Electronic Circuits Systems",
  title =        "Evolutionary design of approximate multipliers under
                 different error metrics",
  year =         "2014",
  month =        apr,
  pages =        "135--140",
  keywords =     "genetic algorithms, genetic programming, Cartesian
                 Genetic Programming",
  abstract =     "Approximate circuits are digital circuits which are
                 intentionally designed in such a way that the
                 specification is not met in terms of functionality in
                 order to obtain some improvements in power consumption,
                 performance or area, in comparison with fully
                 functional circuits. In this paper, we propose to
                 design approximate circuits using evolutionary design
                 techniques. In particular, different error metrics are
                 used to assess the circuit functionality. The proposed
                 method begins with a fully functional circuit which is
                 then intentionally degraded by Cartesian genetic
                 programming (CGP) to obtain a circuit with a predefined
                 error. In the second phase, CGP is used to minimise the
                 number of gates or another error criterion. The effect
                 of various error metrics on the search performance,
                 area and power consumption is evaluated in the task of
                 multiplier design.",
  DOI =          "doi:10.1109/DDECS.2014.6868777",
  notes =        "Also known as \cite{6868777}",
}

Genetic Programming entries for Zdenek Vasicek Lukas Sekanina

Citations